Janani Rangaraj

Janani Rangaraj is a Senior ASIC DFT Engineer at NVIDIA, working on the DFT RTL implementation of next-gen chips. They previously held internships at CodeBind Technologies and Uniq Technologies, where they developed an SDRAM controller and embedded systems, respectively. Janani completed a Graduate Technical Internship at Intel, focusing on fault isolation tests for microprocessors and chipsets. They earned a Master of Science in Electrical Engineering from the University of Southern California and a Bachelor's degree in Electronics and Communications Engineering from Anna University.