Jayesh Pandey is a Senior Methodology Engineer (DFT) at NVIDIA, bringing over 18 years of expertise in DFT/DFX methodology development and implementation. They have architected innovative DFT solutions, deployed online testing mechanisms, and led teams to enhance product reliability. Previously, Jayesh worked at Tech Vulcan, eInfochips, Texas Instruments, and LSI Corporation in roles that focused on memory BIST, low-power DFT, and methodology development. Currently, Jayesh is pursuing an M.Tech. in VLSI-Design while also completing their B.Tech. in Electrical Engineering from NIT Hamirpur.
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