Jianhui Chen

Jianhui Chen is a Senior ASIC engineer at NVIDIA, where they develop embedded out-of-order RISC-V cores. Prior to this role, Jianhui worked as an ASIC engineer at OmniVision from 2006 to 2010. With a strong engineering background, Jianhui is skilled in System on a Chip (SoC), Application-Specific Integrated Circuits (ASIC), Verilog, RTL Design, and Field-Programmable Gate Arrays (FPGA).