Joel Feldman

Joel Feldman is a seasoned engineering professional with extensive experience in ASIC verification and design verification. Currently serving as a Sr ASIC Verification Engineer at NVIDIA since February 2018, Joel leads the RTL Design Verification team for GPU product PCIe subsystems, focusing on DV strategy, testbench architecture, and project management. Prior to this, Joel held a Sr Staff Design Verification Engineer role at Intel Corporation from January 2010 to February 2018, where responsibilities included leading global technical efforts in SystemVerilog Testbench methodologies for advanced System-on-Chip designs. Joel's earlier experience includes positions at Magma Design Automation as a Sr Field Applications Engineer, and as a Sr VLSI Design Engineer at Motorola Semiconductor. Joel's academic qualifications include a BS from the Rochester Institute of Technology and an MS from National Technological University.