Jorge Paredes is a Senior Package Layout Engineer at NVIDIA, where they have been employed since 2019 and currently serve as Package Layout Engineering Manager. With a background in PCB layout design dating back to 2005, Jorge possesses extensive knowledge in high-speed design and Design for Manufacturability guidelines. They have also worked as a Senior PCB Design Engineer at Tesla Motors and held positions at Delphi and Continental Automotive Systems. In addition to their industry experience, Jorge has taught PCB Design as an Associate Professor at ITESO Universidad Jesuita de Guadalajara.
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