Kamesh Gupta P is a Senior Physical Design Engineer currently working at NVIDIA since 2024. They previously held roles as a P1 Technical Architect of Physical Design at Cerium Systems from 2018 to 2022 and as a SOC Lead at Intel Corporation from 2022 to 2024. Kamesh began their career as a Physical Design Engineer at Infotech Enterprises Ltd, contributing to various technologies including 180nm and 40nm, and worked at AMD as a Senior Design Engineer from 2013 to 2018. Kamesh holds a Master of Technology in VLSI from Andhra University and a B.Tech in Electronics and Communication Engineering from JNTU University.
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