Konark Patel is a Senior Engineer at NVIDIA since October 2022, bringing extensive expertise from previous roles as an ASIC Engineer at Juniper Networks (January 2021 - October 2022) and a Verification Engineer at eInfochips (July 2016 - January 2021), where work focused on Ethernet VIP and OTN Network Framework related VIPs. Prior to that, Konark served as a Trainee at Space Applications Centre, ISRO from August 2015 to June 2016. Academically, Konark holds a Master’s Degree in VLSI Design from VIT University (2014 - 2016) and a Bachelor’s Degree in Electronics and Communications Engineering from Gandhinagar Institute of Technology (2009 - 2013), along with a High School Diploma in Science from Gayatri Vidhyalay School, Ahmedabad (2007 - 2009).
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