Lalit Gupta is a Circuit Design Engineer at NVIDIA, focusing on the Ultra High Density Pseudo DPRAM Compiler at 16ff. They explore various memory architectures to achieve high performance while minimizing power consumption and area. Their past experience includes roles as Principal Circuit Engineer, Senior Design Engineer, and Assistant Engineer at leading technology firms like Arm and Virage Logic. Lalit holds a B.Tech in Electronics & Instrumentation from The Technological Institute of Textile & Sciences and a PG Diploma in VLSI Design from Sandeepani School of VLSI Design.
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