lucas liu

Lucas Liu has extensive experience in verification engineering, primarily with NVIDIA from September 2012 to March 2014, where roles included SoC Verification Engineer, Verification Infrastructure Engineer, Senior Design Verification Engineer, and Verification Manager, focusing on system level random verification frameworks, UVM testbench development, and overseeing design verification for projects such as the Nvidia Deep Learning Accelerator. Prior to NVIDIA, Lucas Liu worked as an ASIC Verification Engineer at Hisilicon from July 2010 to September 2012, developing unit testbenches using SystemVerilog. Lucas Liu holds a Master of Electrical Engineering in Semiconductor & Microelectronics from Harbin Institute of Technology, obtained in 2010.