Mini Rawat

Senior ASIC Design Engineer

Mini Rawat has extensive experience in ASIC design and microprocessor architecture, spanning numerous reputable companies. At Intel Labs, Mini contributed to the high-performance design of next-generation processor architectures and developed logic design for microprocessor cores. Mini held positions as a Senior ASIC Design Engineer at NVIDIA and as a Senior Design Engineer at Xilinx, focusing on power and performance architecture for GPUs and FPGAs, respectively. Prior experience includes roles at Intel Corporation, where Mini specialized in cache design for servers, and ST Microelectronics, focusing on front-end design engineering. Mini holds a B-Tech in Electronics & Communication Engineering from Madan Mohan Malviya Engineering College and a Master of Science in Electrical Engineering from the University of Texas at Dallas.

Location

Santa Clara, United States

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