Munish Aggarwal is a Senior Design Engineer at NVIDIA, where they focus on design for testability (DFT). With a strong background in scan insertion methodologies and ATPG pattern generation, they have extensive experience in ASIC design and validation. Munish previously worked as an ASIC Design Engineer at Open-Silicon and as a Design Engineer at STMicroelectronics. They hold an M.Tech in VLSI & Embedded Systems from the Dhirubhai Ambani Institute of Information and Communication Technology, along with a B.Tech in Electronics & Communication.
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