Nishit Patel is a Senior Mask Design Engineer at Nvidia, where they have worked since 2015. They possess hands-on experience with ASIC design tools, including synthesis and physical design, and a deep understanding of logic design and CMOS concepts. Prior to Nvidia, Nishit served as an MTS at DXCorr Design Inc from 2013 to 2015 and completed a trainee program at e-Infochips in 2013. Nishit is well-versed in Verilog HDL and has good knowledge of STA concepts, as well as familiarity with TCL and Perl scripts.
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