Sujeeth G is a Senior ASIC Engineer at Nvidia Graphics India Pvt Ltd with over 8 years of experience in RTL design, specializing in System Verilog, Verilog, and VHDL. Sujeeth has extensive expertise in ASIC and FPGA design, having previously worked in the 5G communication R&D group at Samsung Research Institute Bangalore. Their background includes significant roles at Samsung Semiconductor and Mistral Solutions, where Sujeeth contributed to image sensor prototyping and high-speed networking projects. Sujeeth holds a Bachelor of Engineering in Electronics and Instrumentation Engineering from Government College of Technology, Coimbatore.
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