Xueying Jiang is a skilled Physical Design Engineer at NVIDIA since February 2022, with previous experience as a Principal Design Engineer and Lead Design Engineer at Cadence Design Systems from November 2015 to January 2022. Xueying's career began with an internship at the Chinese Academy of Sciences in 2013, where significant contributions were made to the research of 8T-SRAM, enhancing both stability and speed of reading and writing circuits. Xueying holds a Master's Degree in Electrical and Electronics Engineering (VLSI) from the University of Southern California, obtained in 2015, and a Bachelor of Science in Micronelectronics from North China University of Technology, completed in 2013.
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