Zacchaeus Williams

Zacchaeus Williams is a Senior ASIC Engineer at NVIDIA, a role undertaken since February 2022 after serving as an ASIC Engineer. Prior experience includes positions as a Teaching Assistant for Embedded System Software Engineering and Signals and Systems at Carnegie Mellon University, as well as a Research Assistant focusing on Virtual FPGA and Side Channel Analysis of Xavier Boards. Williams previously interned as a Low Power Architect at NVIDIA and as a Computer Engineer Intern at Booz Allen Hamilton. Zacchaeus holds both a Master's and Bachelor's degree in Electrical and Computer Engineering from Carnegie Mellon University, completed in 2021 and 2021, respectively.