Sahas Kumar Patha is a highly experienced Staff Digital Design Engineer currently employed at onsemi since April 2025. Prior roles include Digital Design Engineer at Kandou AI from June 2023 to March 2025, Staff ASIC Design Engineer at MaxLinear from November 2021 to June 2023, Senior Design Engineer 1 at Xilinx from August 2019 to November 2021, and Senior ASIC Design Engineer at MaxLinear from July 2015 to August 2019. Earlier experience includes working as a Research Student at the Indian Institute of Science, where algorithms for LTE-Advanced Cellular Systems were developed, and internships at Broadcom and CFTRI. Sahas Kumar Patha holds a Master of Engineering in Telecommunication Engineering from the Indian Institute of Science and a Bachelor of Engineering in Electronics and Communication Engineering from the Birla Institute of Technology and Science, Pilani.
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