Oupei Yang

Oupei Yang has extensive experience in hardware engineering, currently serving as Hardware Team Lead at Optiver since April 2018, focusing on hardware trading system architecture and FPGA design and verification. Prior to this role, Oupei worked as a Hardware Engineer at Optiver, contributing to FPGA design and verification for securities trading and market making. Experience also includes a tenure at Ciena from November 2009 to April 2018 as an FPGA Engineer, specializing in FPGA design and verification for optical networking applications. Earlier, Oupei was a Hardware Engineer at PESA QuStream, working on video and audio processing algorithms, FPGA development, and PCB design. Educationally, Oupei holds both a BS and MS in Electrical Engineering, as well as a BS in Industrial Engineering from the Georgia Institute of Technology, completed between 2003 and 2007.