Riccardo Chiello

Riccardo Chiello is an experienced engineer specializing in FPGA design and development. Currently serving as an FPGA Engineer at Optiver since November 2023, Riccardo focuses on enhancing market performance through FPGA technology. Previously, as Lead Electronics Engineer at the University of Oxford from September 2014 to October 2023, Riccardo led the MCCS firmware group for the SKA project, developing firmware and low-level software for the high-performance Tile Processing Module. Riccardo also worked as a Senior FPGA Designer at Sanitas EG from May 2002 to August 2014, where significant projects included a high-performance computing board for space applications and various IP cores for Xilinx and Lattice FPGA devices. Earlier experience includes collaboration with the COSYSPACE group at IASF Milano. Riccardo holds a Master's degree in Physics with a specialization in Electronics from Università degli Studi di Milano.