Ryan Xiao -

Ryan Xiao - 肖云 is an experienced hardware developer with a strong background in ASIC design and implementation. Currently serving as the ASIC physical design lead and backend architect at Optiver since April 2022, Ryan has previously contributed to the silicon team at Graphcore and worked as a staff implementation engineer at ARM, focusing on CPU core implementation and methodology development. Ryan's earlier experience includes a role as a Senior Physical Design Engineer at Imagination Technologies, where responsibilities encompassed top level design planning and full chip signoff. Ryan holds a Master's degree in Microelectronics Systems Design from the University of Southampton and a Bachelor's degree in Information Engineering from South China University of Technology.