Bala S is currently a Lead Engineer at Oracle, specializing in SoC and design verification methodologies. With a robust background in developing intricate verification testbenches using SystemVerilog, Vera, Specman, and Verilog, Bala has successfully led ASIC verification programs targeting various protocols, including PCI-Express, USB3.0, and RapidIO. Prior to Oracle, Bala worked as a Staff Engineer at Freescale from 2002 to 2012, gaining extensive experience in the field.
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