Tom Ziaja is a DFT engineer with extensive experience in designing strategies to increase test coverage in custom processors and SoC designs. Currently at a stealth mode startup, Tom focuses on hardware at a ML/AI company. Previously, Tom served as a Senior Staff Engineer at Sun Microsystems, where they developed Design-for-Test strategies for next-generation multi-threaded processors, and as an Advisory Engineer at IBM, analyzing test coverage for the Power 4 processor. Tom holds a Ph.D. in Computer Engineering from The University of Texas at Austin.
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