Roy Bodner

Roy Bodner is an experienced FPGA engineer with a focus on networking, packet processing, time synchronization, and digital signal processing. Currently, Roy serves as the Manager FPGA at Parallel Wireless, overseeing a team of design and verification engineers while working on scalable ORAN-compatible radio units. Prior to this, Roy held positions as a Senior FPGA Engineer at D-Fend Solutions, an ASIC Design Engineer at Wisense Technologies, and an FPGA Engineer at various companies, leading several FPGA projects from architecture to implementation. Roy earned a BS.c in Electrical Engineering from Bar-Ilan University, specializing in communications and microelectronics.