Lokesh Peddayenumula

Design Verification Engineer

Lokesh PeddaYenumula is a Senior Verification Engineer 1 at Microchip Technology Inc. since June 2023, with additional roles as a Design Verification Engineer at Scaledge Technology and PerfectVIPs since November 2021. Prior to these positions, Lokesh worked as a VLSI Engineer at Wipro Limited from June 2019 to December 2021. Educational background includes a Bachelor of Technology in Electrical, Electronic and Communications Engineering from Sree Vidyanikethan Engineering College (2014-2018), an RTL Design & Verification course from Maven Silicon (2018-2019), intermediate studies at NRI Academy in Guntur (2012-2014), and high school education at Keshava Reddy Public School (2007-2012).

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Bengaluru, India

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