Guy Eschemann

Senior FPGA Design Engineer at PLC2

Guy Eschemann is a seasoned technical professional with extensive experience in FPGA design and embedded software development. Since January 2022, Guy has served as a Senior FPGA Design Engineer at PLC2. Concurrently, Guy founded and has been the CEO of noasic GmbH since October 2009, where development and promotion of airhdl.com, a widely used web-based code generator, has reached over 1500 users in the FPGA and chip development community. Prior to these roles, Guy has held positions such as Senior Development Engineer at FormLED GmbH, Embedded Software Developer at ATT Nussbaum Prüftechnik GmbH, FPGA Design Engineer at Enclustra GmbH, and Research Engineer at Sennheiser and Advanced Computer Vision GmbH. Guy began a career in software development at FUBA Automotive GmbH & Co. KG, focusing on mobile TV technologies. Educationally, Guy holds an Ingenieur INSA degree in Electrical Engineering from INSA Lyon.

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