Yevgeny Perelman

Analog Design Lead

Yevgeny Perelman is an experienced Analog Design Lead Engineer with over 20 years in analog and mixed-signal IC design. They have worked at notable companies such as Intel Corporation, where they served as a Principal Engineer in the High-Speed SERDES PHY group, focusing on 100GBps TX architecture. Previously, Yevgeny held senior positions at Saifun and Sorin CRM, contributing to complex circuit designs and MEMS accelerometer modules. They hold a Ph.D. in Analog VLSI circuits from the Technion-Machon Technologi Le' Israel, reflecting their strong academic background in the field. Currently, Yevgeny leads analog design efforts at Pointcloud Inc.

Location

Zurich, Switzerland

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