Sheng Yu

Sheng Yu is a Staff RFIC Design engineer at pSemi, A Murata Company, with over four years of experience in 5-7G CMOS 75nm SOI PA design and expertise in 55nm CMOS Digital PA RFIC design. Previously, they held positions as Project Manager and RRU System Test Manager at Gewei Electronic Technology Co. Ltd. and worked as an RFIC Design Intern at InnoPhase. Sheng has a solid background in BaseStation PA module design and verification, with additional experience in RF engineering and system testing from their time at Andrew Corporation. They earned a Master's degree in Electrical and Electronics Engineering from Illinois Institute of Technology and obtained both a Master's and Bachelor's degree from Huazhong University of Science and Technology.