Dan Pace is an experienced engineering professional with a notable career in physical design and layout across various leading technology companies. Currently serving as a Staff Physical Design Engineer at Qorvo, Inc. since May 2018, Dan has previously held positions at Intel Corporation as a Physical Design Engineer and at PALMA CEIA SEMIDESIGN, INC. as a Senior RF/Analog Layout Engineer. Other significant roles include Senior Mask Layout Engineer at NVIDIA, Staff Mask Layout Designer at Qualcomm, and Senior Staff RFIC Layout Designer at Microtune. Dan's early career features positions at Anadigics as CAD Manager, Fujitsu Microelectronics Inc. as Senior Product Development Engineer, and ITT GTC as Senior Designer. Educational qualifications include an Associate of Applied Science in Drafting & Design from Asheville-Buncombe Community College, complemented by a high school diploma from Pisgah Sr. High School.
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