Aditya Kodali

Aditya Kodali is a Senior Staff Engineer at Qualcomm, where they focus on Place and Route (PnR), Static Timing Analysis (STA), Physical Verification (PV), and Reliability Health (RH). Previously, they served as a Physical Design Engineer at AMD and Broadcom, contributing to multiple GPU families and overseeing full-chip physical verification. Aditya's educational background includes a Master's degree in VLSI with Distinction from VEDA - IIT at Jawaharlal Nehru Technological University. With strong scripting and debugging abilities, they have effectively collaborated with design engineers globally to meet project deadlines.