Arnav Shukla is an ECE Senior at IIIT Delhi, pursuing a Bachelor of Technology in Electrical, Electronics, and Communications Engineering. Currently, Arnav conducts research on novel chiplet architectures aimed at improving AI workload efficiency in collaboration with various labs, including CrossCaps Lab and Infosys CAI. Previously, Arnav interned at the University of Michigan, enhancing LLM frameworks for analog layout translation, and served as a Teaching Assistant for a Probability and Statistics course at IIIT Delhi. Arnav also has experience as an Undergraduate Researcher and is currently an Interim Engineering Intern at Qualcomm.
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