Deepika P

Deepika P is a Senior Lead Engineer at Qualcomm since July 2018, with extensive experience in Design Verification for Wireless Connectivity Sub-Systems in AP/Client WiFi Chipsets. Deepika has previously held positions as a Senior Design Verification Engineer and Design Verification Engineer at Qualcomm, focusing on various aspects including WCSS Clock Controller Verification and MAC Performance Verification. Prior experience includes a role as a Project/Research Trainee at ISRO, where performance improvements were achieved, and as an Associate Engineer in SoC Design at Qualcomm, concentrating on Infotainment Chipsets for the automotive sector. Deepika began a career at ISRO as an Engineering Intern, developing a prototype for Pulse Compression Radar. Educational qualifications include a B.E. in Electronics and Communication Engineering from PSG College of Technology and an M.E. in Communication Systems from Anna University Chennai.