Devika Rani

Devika Rani is a Senior Lead Engineer at Qualcomm since September 2019, specializing in the verification of NOC IP with expertise in Verilog for DUT verification. Prior experience includes a role as Design Verification Engineer at Mindlance Technologies from December 2016 to July 2019, also focusing on NOC IP verification with Verilog proficiency. Devika began a career as an intern at STMicroelectronics in mid-2015, where responsibilities included the development and verification of an Error Correcting Code Generator for IPs using the BCH algorithm. Devika holds an Engineer’s Degree in Electronics and Communications Engineering from YMCA University of Science & Technology, earned in 2016.