Duragappa B is a Senior Memory Layout Design Engineer at Qualcomm, specializing in memory layout design across various technologies, including 7ff, 10nm, 14nm, 16nm, 20nm, 28nm, and 45nm. Previously, they worked as a consultant at Broadcom Inc. and held positions at Karnataka Microelectronic Design Centre and Altran. Duragappa completed training in VLSI chip designing and continues to enhance their expertise in the field.
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