Girish A. is a Principal Engineer at Qualcomm, focusing on Last Level Cache Design. They possess extensive experience in high bandwidth, low latency I/O solutions for server and HPC applications and have expertise in PCIe and emerging coherent I/O protocols such as CCIX and CXL. Previously, Girish held positions at Intel Corporation as a CPU Design Engineer and at NUVIA Inc as a Member of Technical Staff. They completed their graduate studies at the University of Maryland, specializing in Low Power Design and Processor Architecture, where they achieved a 4.0 GPA. Additionally, they gained valuable experience through internships at National Semiconductor, GE, Intel, and CSIR-CEERI.
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