Hareesh Katamreddy is a seasoned professional in the field of engineering with a focus on Design for Testability (DFT). Currently serving as a Principal Engineer at Qualcomm since December 2022, Hareesh previously held the position of Senior Engineer in DFT at the same company. Prior experience includes a role as Senior Engineer in ASIC at Tata Elxsi from March 2005 to August 2008. Hareesh's educational background includes a Postgraduate Diploma in Business Administration (Finance) from Symbiosis Centre for Distance Learning, a Bachelor's degree in Electronics and Communications from Andhra University, a Diploma in VLSI Systems from CDAC Pune, and a secondary education from Jawahar Navodaya Vidyalaya.
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