Jeyakumar A

Jeyakumar A is currently the SoC Static Checks Lead at Qualcomm, where they leverage their extensive experience in Verilog RTL-based IP design, simulation, and verification. They previously held roles as a Staff Engineer and Sr. Staff Engineer at Qualcomm from 2016 to 2018. With a background in front-end VLSI design, Jeyakumar has worked in various capacities at companies such as Arasan Chip Systems Inc, L&T Infotech, and Mirafra Technologies, contributing to SOC integration and validation processes. They possess specialized knowledge in various simulation and synthesis tools, reflecting their expertise in the field.