Lalit Garg is a Principal Engineer at Qualcomm, where they have focused on power grid and electromigration sign-off in digital and analog semiconductor designs since 2022. With over 20 years of experience, they previously held key roles at Cadence Design Systems, including Sr Principal Product Engineer and Product Engineering Director. Lalit also worked as a QA Engineer at Tata Telecom Ltd from 1999 to 2000. They hold a degree from Gujarat University, earned between 1994 and 1998.
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