Lithin Balu is a Senior Staff Engineer at Qualcomm, specializing in SOC DDR Design Verification. Previously, they held senior roles at AMD, where they focused on datapath verification and PHY training for LPDDR5 and DDR5 projects. Lithin's experience also includes significant contributions at Intel Corporation as an IP Logic Design Verification Engineer, where they developed a reusable modular verification environment. They began their career in design verification during an internship at Intel Technology Pvt Ltd while pursuing a Master of Technology in VLSI Design at VIT University.
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