Rajesh Vanapalli is a Senior Physical Design Engineer currently at Qualcomm since 2025. They previously held a position at Intel Corporation in 2020, contributing to the development of a next-generation 7nm CPU core as a Structural and Synthesis Design Engineer intern and later as a CPU Circuit Design Engineer. Prior to that, Rajesh worked as a Subject Matter Expert in Computer Science at Chegg Inc. from 2013 to 2015, and served as a Systems Engineer at Tata Consultancy Services from 2015 to 2018. They possess extensive skills in advanced physical design EDA tools and have demonstrated strong expertise in design automation and debugging.
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