Ranjeeth T M

Ranjeeth T M is a Senior Lead Engineer at Qualcomm, bringing over 9.5 years of experience in design verification. They earned a Master of Technology in VLSI from Sri Jayachamarajendra College of Engineering in 2016. Ranjeeth previously held positions at Cientra as a Senior Design Verification Engineer and at HCL Technologies as a Member of Technical Staff. Their career began with an internship at RV-VLSI and a contract role as a DV Engineer at Lattice Semiconductor.