Ratan Devpura

Ratan Devpura is a Senior Staff Physical Design/STA Engineer/Manager at Qualcomm, with over 17 years of experience in leading complex SOC designs from netlist to GDS across advanced technology nodes. They have held various roles, including SOC Design Lead at Intel Corporation and PD Lead at eInfochips, demonstrating proven expertise in full chip and block level STA, end-to-end physical design flow, CTS, and power optimization. Ratan is passionate about mentoring engineers and optimizing design methodologies to deliver high-performance, power-efficient chips for next-generation applications. They are currently pursuing a Master's degree in Electrical and Computer Engineering at San Diego State University and have previously completed a Bachelor's degree in Electronics and Communications.