Sanchit Tandon

Sanchit Tandon is currently a SoC Design Engineer at Qualcomm, where they have contributed to five Snapdragon SoC tapeouts and managed full chip timing constraints for three SoCs over four years. Sanchit is actively involved in SoC IO interfaces timing signoff and has worked on advanced technodes including 2nm, 3nm, 4nm, and 5nm. Additionally, they have experience in logical and physical synthesis, design constraints, and have developed several automations to improve RTL to GDS turnaround time. Sanchit graduated from DTU with a focus on Electronics and Communication Engineering in 2021.