Sandeep R is a Senior Lead Physical Design Engineer at Qualcomm, specializing in low power physical design verification across advanced technologies such as 3nm, 4nm, 5nm, 7nm, and 10nm. They possess extensive expertise in low power technology, including techniques like UPF, CLP, and formal verification (LEC), as well as Power Aware Formal verification (PA_FV). Sandeep earned a Bachelor of Technology in Electronics and Communication from SRM University, graduating with a 9.0 CGPA in 2017. They previously held positions as a Low Power Verification Engineer and Senior Low Power Verification Engineer at Qualcomm from 2021 to 2023.
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