Sandeep V. is an experienced engineer with a strong background in design verification and embedded systems. Sandeep has held various positions, including Senior Engineer at Qualcomm, where responsibilities include leading block level functional and formal verification for low power and high performance applications using UVM/SV methodologies. Previous roles at ViaSat Inc. and Intel Corporation involved FPGA/ASIC RTL design and architecture verification intern tasks, respectively. Sandeep’s experience also includes electrical and instrumentation engineering at Adani Group and embedded systems development at Tech Mahindra. Academic qualifications include a Master’s Degree in Electrical & Computer Engineering from Portland State University and a Bachelor’s Degree in Electronics and Telecommunications from Biju Patnaik University of Technology.
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