Shivangi Tripathi

Shivangi Tripathi is currently a Senior Lead Engineer at Qualcomm (Nuvia), focusing on RISC V CPU Design. Previously, Shivangi served as a Senior Design Engineer at MIPS, where they worked on the Design and Implementation of the Trace Unit in the RISC-V Core. Prior to that, Shivangi was an IP Design Engineer at Intel Corporation, responsible for micro-architecture and RTL Design Implementation. Shivangi's career began as an R&D Engineer at LOGIC-FRUIT TECHNOLOGIES and included an internship at Mentor Graphics, where they gained hands-on experience in Verilog and System-Verilog. Shivangi holds a Bachelor's Degree in Electrical, Electronics, and Communications Engineering from MNNIT Allahabad.