Sidlingesha G has extensive experience in the semiconductor industry, starting as a Design Engineer at Sankalp Semiconductor Pvt Ltd from February 2017 to September 2019 and progressing to a Layout Engineer at Qualcomm India Pvt Ltd from September 2019 to November 2022. Currently, Sidlingesha serves as a Senior Layout Engineer at Qualcomm. Educational qualifications include an Engineer’s Degree in Electrical and Electronics Engineering from Cambridge Institute of Technology, a Master of Technology in Integrated Circuits and Systems from the Indian Institute of Technology, Madras, and prior studies at Kottureshwara College and Govt High School for Boys, Kottur.
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