Sree Menon is a seasoned Silicon Low Power Architect with extensive experience in semiconductor engineering. At Samsung Semiconductor, Sree served as a Senior MTS CPU Power and Timing Optimizer from 2015 to 2020, where they drove power and timing improvements for Exynos chips in Galaxy phones. Previously, Sree worked at AMD as a Principal MTS Engineer focusing on silicon design engineering, and also held positions at Ericsson and Qualcomm, where they are currently a Principal Engineer. Sree's foundational experience includes a role as a Tech Transfer Engineer at Auburn University, where they conducted patent landscape analyses. Sree is currently pursuing a degree in Electrical and Computer Engineering at Auburn University.
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