Wenting Qiu

Wenting Qiu is a seasoned professional in analog circuit design, currently serving as a Senior Analog Designer at 高通公司 since June 2020, with a focus on analog/mixed signal circuit designs including SerDes PHY, Ethernet PHY, and DDR PHY. Prior experience includes working as an Analog Design Engineer at Huawei Technologies, where research concentrated on high-speed Sigma-Delta ADCs for base stations, and as an analog circuit designer at Huali Microelectronics Corporation, creating analog IP designs for client solutions. Wenting also gained valuable experience as a Graduate Intern at Holst Centre/IMEC-NL, developing SAR ADCs for biomedical applications, and as a Control Engineer Intern at Powerbox Benelux BV. Wenting holds a Master's Degree in Electrical Engineering (Mixed-signal Microelectronics) from Eindhoven University of Technology, a Bachelor of Science in Electrical Engineering (Mechatronics) from HZ University of Applied Sciences, and a Bachelor's Degree in Electrical Engineering and Intelligent Control from Shanghai Maritime University.