Mitchell Levine

Mitchell Levine is a Senior Physical Design Engineer at QuickLogic Corporation since August 2025, with a robust background in design verification and engineering across multiple organizations. Prior experience includes roles as a Senior Design Verification Engineer at Nexperia and a Design Engineer at LinearASICs, where responsibilities encompassed running top-level simulations, developing PCells, and programming tools in Python. Mitchell's career began at Texas Instruments as a Mixed Signal Designer, where simulation and productivity tools were key contributions. Education includes a Master of Science in Electrical and Electronics Engineering from the Georgia Institute of Technology and a Bachelor of Science in the same field from the University of Florida.