Chanyoun Won earned a Ph.D. in Electrical Engineering from North Carolina State University in 2011, where they researched multimode interconnects for high-density links. They held internships at Rambus during their Ph.D. studies and subsequently worked as a Senior Analog Circuit Designer at Intel, focusing on next-generation high-speed memory interfaces. From 2015 to 2024, Chanyoun served as a Senior Staff Electrical Engineer at Renesas Electronics, specializing in high-speed memory interface design. Currently, they are a Senior Principal Engineer at Rambus, continuing to advance their expertise in high-speed I/O and memory interface circuit design.
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