Lidia Warnes

Lidia Warnes is currently a Principal Engineer at NVIDIA, where they engage with cloud service provider customers and contribute to memory subsystem RAS requirements and workload performance analysis. Previously, Lidia held positions at Intel Corporation, where they led memory pooling architecture definitions, and at Hewlett-Packard, where they played a key role in designing and validating memory subsystems and promoting industry standards. Lidia also served as a Teaching Assistant at California State University, Sacramento, and has authored multiple patents in the field of memory technology. With a strong educational background, including a Master of Science in Electrical Engineering from California State University, Sacramento, Lidia has demonstrated a commitment to innovation and leadership in diverse teams throughout their career.